Changes to suppress the switching probability of circuits are conducted in order to reduce the power consumption of the semiconductor chip. However, the logic behavior of the entire circuit must not be changed as a matter of course. Therefore, in the conventional arts, logic simulation may be carried out to confirm whether or not the operation of the circuit before the changes is identical to the operation of the circuit after the changes, or formal verification may be carried out. Incidentally, although various design techniques to reduce the power consumption exists, there is no technique to verify the circuit changes conducted in order to reduce the power consumption.
As for the conventional arts, it is necessary for the designer to describe identicalness conditions for the respective changes in order to judge whether or not the operation of the circuit after the changes is identical to the operation of the circuit before the change. This makes the designer's load large. In addition, when the circuit before the change is modified due to bugs or the like, it is necessary to modify both of the circuits before and after the change. This also makes the designer's load large.